Front Cover -- Wide Bandgap Semiconductor Power Devices -- Copyright Page -- Contents -- List of Contributors -- Preface -- 1 Introduction -- 1.1 Silicon power devices -- 1.2 Silicon power device applications -- 1.3 Silicon carbide ideal specific on-resistance -- 1.4 Silicon carbide power rectifiers -- 1.5 Silicon power MOSFETs -- 1.6 Silicon carbide power MOSFETs -- 1.7 Silicon carbide power junction barrier Schottky field effect transistors (JBSFETs) -- 1.8 Silicon carbide power MOSFETs with improved high frequency performance -- 1.9 Silicon carbide bidirectional field effect transistor -- 1.10 Silicon carbide power device applications -- 1.11 Gallium nitride power devices -- 1.12 Gallium nitride power device applications -- 1.13 Summary -- References -- 2 SiC material properties -- 2.1 Crystal and band structures -- 2.2 Electrical properties -- 2.2.1 Impurity doping and carrier density -- 2.2.2 Mobility -- 2.2.3 Drift velocity -- 2.2.4 Impact ionization coefficients and critical electric field strength -- 2.3 Other physical properties -- 2.4 Defects and carrier lifetimes -- 2.4.1 Extended defects -- 2.4.2 Point defects -- 2.4.3 Carrier lifetimes -- References -- 3 Physical properties of gallium nitride and related III-V nitrides -- 3.1 Crystal structure and related properties -- 3.2 Polarization charges -- 3.3 Substrates for GaN epitaxial growth -- 3.3.1 Sapphire substrates -- 3.3.2 SiC substrates -- 3.3.3 Silicon substrates -- 3.4 Band structure and relevant properties -- 3.4.1 Effective mass of carries -- 3.4.2 Effective density of states -- 3.5 Transport properties -- 3.5.1 2D mobility in GaN/AlGaN structures -- 3.6 Impact ionization coefficients -- 3.7 Defects in GaN -- 3.7.1 Intrinsic point defects -- 3.7.2 Other defects -- 3.7.3 Impurities in GaN -- 3.7.4 Group-II impurities -- 3.7.5 Group-IV impurities -- 3.7.6 Group VI impurities. 3.7.7 Deep levels -- 3.8 Conclusions -- References -- 4 SiC power device design and fabrication -- 4.1 Introduction -- 4.2 SiC diode -- 4.2.1 Introduction -- 4.2.2 SiC-JBS device design for low on-state loss -- 4.2.3 Edge terminations for SiC-JBS device -- 4.2.4 SiC-JBS device design for higher ruggedness -- 4.2.5 SiC-JBS and Si-IGBT hybrid type module -- 4.2.6 PiN diode -- 4.2.7 Bipolar degradation -- 4.2.8 Summary -- 4.3 SiC-MOSFET -- 4.3.1 Introduction -- 4.3.2 Device structure and its fabrication process -- 4.3.2.1 Planar MOSFET structure -- Fabrication process -- Blocking characteristics -- Exclusive process technologies for SiC-MOSFET -- Cell design -- IEMOSFET devices -- 4.3.2.2 UMOSFET structure -- Fabrication process -- Blocking characteristics -- UMOSFET with gate shielding structure -- IE-UMOSFET and V-groove trench devices -- 4.3.2.3 SiC-MOSFET loss estimation due to its high drain-source capacitance -- 4.3.2.4 Short-circuit safe operating area -- 4.3.2.5 Improvement of trade-off characteristic between on-resistance and SCSOA for SiC UMOSFET structure -- 4.3.3 Future SiC-MOSFET structure -- 4.3.3.1 Monolithically integrated SiC-MOSFET and SBD structure -- 4.3.3.2 Superjunction MOSFET device -- 4.3.3.3 SiC MOSFET with reverse blocking capability -- 4.3.3.4 Complementary p-channel MOSFET device -- 4.3.4 Summary -- 4.4 SiC-IGBT -- 4.4.1 Introduction -- 4.4.2 Device structure and its fabrication process -- 4.4.2.1 p-channel IGBT or n-channel IGBT -- 4.4.2.2 Flip-type IEIGBT structure -- 4.4.3 Summary -- References -- 5 GaN smart power devices and integrated circuits -- 5.1 Introduction -- 5.1.1 Material properties -- 5.1.2 Epitaxy and doping -- 5.1.3 Polarization and 2DEG -- 5.1.4 MOS -- 5.1.5 Power device applications -- 5.2 Device structures and design -- 5.2.1 Lateral -- 5.2.2 Vertical -- 5.3 Integrated device processes -- 5.3.1 Lateral. 5.3.2 Vertical -- 5.4 Device performance -- 5.4.1 Static -- 5.4.2 Dynamic switching -- 5.4.3 Robustness -- 5.4.4 Device choices in applications -- 5.5 Commercial device examples -- 5.5.1 Discrete transistors -- 5.5.1.1 Efficient power conversion -- 5.5.1.2 Panasonic/Infineon -- 5.5.1.3 GaN systems -- 5.5.2 Hybrid transistors -- 5.5.2.1 Cascoded (International Rectifier (IR)/Infineon) -- 5.5.2.2 Cascoded (Transphorm) -- 5.5.2.3 Direct-drive transistors (Texas Instruments) -- 5.5.3 Integrated transistors -- 5.5.3.1 Navitas -- 5.6 Monolithic integration -- 5.6.1 Power ICs -- 5.6.2 Optoelectronic ICs -- 5.7 Future trend, possibilities, and challenges -- Acknowledgments -- References -- 6 GaN-on-GaN power device design and fabrication -- 6.1 Introduction -- 6.2 Requirements from a power switch -- 6.2.1 Normally-off operation -- 6.2.2 High breakdown voltage -- 6.2.3 Low on-resistance and high current density -- 6.2.4 High temperature operation -- 6.3 Substrates and epitaxial layers -- 6.4 Availability of GaN substrate -- 6.5 Vertical devices: Current aperture vertical electron transistor -- 6.6 A brief history of GaN vertical devices -- 6.7 Design of a current aperture vertical electron transistor and its key components -- 6.8 Doping in the aperture (Nap) and length of the aperture (Lap) -- 6.9 Drift region thickness (tn−) -- 6.10 The channel thickness tUID and effective gate length (Lgo) -- 6.10.1 Through the CBL -- 6.10.2 Unmodulated electrons -- 6.10.3 Through the gate -- 6.11 Current blocking layers -- 6.11.1 A discussion on doped versus implanted current blocking layer -- 6.12 Trench-current aperture vertical electron transistor -- 6.13 Metal oxide semiconductor field-effect transistor -- 6.13.1 Non-regrowth-based metal oxide semiconductor field-effect transistors -- 6.13.2 Regrowth-based metal oxide semiconductor field-effect transistor (OGFET). 6.13.3 OGFET switching performance -- 6.14 GaN-high voltage diodes -- 6.15 Edge termination, leakage, and active area of the device -- 6.16 Conclusion -- Acknowledgment -- References -- Further Reading -- 7 Gate drivers for wide bandgap power devices -- 7.1 Introduction -- 7.2 Gate drivers for LV SiC devices (1200 and 1700V SiC MOSFETs and JFETs) -- 7.2.1 Introduction -- 7.2.2 Basic structure of a gate driver -- 7.2.2.1 PWM signal channel -- 7.2.2.2 Power supply -- 7.2.3 Design considerations for LV SiC MOSFETs -- 7.2.3.1 Gate driver schematic -- 7.2.3.2 Layout design considerations -- 7.2.3.3 Separate power supply -- 7.2.3.4 Shoot through protection -- 7.2.3.5 High current drive -- 7.2.4 Active gating -- 7.2.4.1 Block diagram -- 7.2.4.2 Voltage clamping to reduce voltage overshoot -- 7.2.5 Evaluation of gate drivers for 1200/1700V devices -- 7.2.6 Characterization of 1200V, 100A SiC MOSFET -- 7.2.7 Characterization of 1700V SiC MOSFET and comparison with 1700V Si IGBT and 1700V Si BIMOSFET -- 7.2.8 Characterization of 1200V, 45A SiC JFET module -- 7.2.9 Review of commercially available gate drivers -- 7.3 Gate drivers for GaN devices (up to 650V) -- 7.3.1 GD specifications and design considerations, challenges, and implementation -- 7.3.1.1 Gate-loop inductance -- 7.3.1.2 Spurious turn-on -- 7.3.1.3 Common-source inductance -- 7.3.1.4 Common-mode current -- 7.3.2 Layout recommendations -- 7.3.3 Gate-drive design for GaN four-quadrant switch (FQS) -- 7.3.4 Commercially available gate driver ICs and trends -- 7.4 Qualification of gate drivers -- 7.4.1 Gate driver operation for controlling MOSFET turn-on/turn-off -- 7.4.1.1 Common mode issue in gate drivers -- 7.4.1.2 Isolation or creepage issue in the driver -- 7.4.1.3 Cross talk between top and bottom gate drivers -- 7.4.1.4 Shoot through due to inappropriate dead time. 7.4.1.5 VSC pole two level topology -- 7.4.2 Steps of gate driver qualification -- 7.4.2.1 Double pulse test (DPT) converter -- 7.4.2.2 Boost-converter operation -- 7.4.2.3 Buck-boost converter operation -- 7.4.3 Short-circuit testing of gate driver for high-voltage switch -- 7.4.4 GD characterization for the current switch operation and test circuit -- 7.4.4.1 Double pulse test -- 7.4.4.2 Continuous operation test -- 7.5 Gate drivers for HV SiC devices -- 7.5.1 GD specifications and design considerations -- 7.5.2 GD power supply -- 7.5.3 Intelligent gate driver -- 7.5.3.1 Block diagram -- 7.5.3.2 Short-circuit protection scheme -- 7.5.3.3 Hard switch short-circuit fault test setup -- 7.5.3.4 Single pulse test setup -- 7.5.3.5 Boost converter test setup -- References -- 8 Applications of GaN power devices -- 8.1 Hard switching vs soft switching -- 8.2 Bidirectional buck/boost converter -- 8.2.1 Coupled inductor at CRM -- 8.2.2 Bidirectional buck/boost converter -- 8.3 High frequency PFC with PCB winding coupled inductor -- 8.3.1 GaN-based MHz totem-pole PFC -- 8.3.1.1 ZVS extension -- 8.3.1.2 Variable on-time control -- 8.3.1.3 Dual-phase interleaving and ripple cancellation -- 8.3.2 PCB winding integrated coupled inductor -- 8.3.3 Balance technique to reduce common mode noise -- 8.4 400 V/12 V DCX for server applications -- 8.4.1 Introduction to datacenter architecture with 400 V bus -- 8.4.2 400 V/12 V LLC converter with matrix transformer -- 8.4.3 Integrated planar matrix transformer -- 8.4.4 Shielding techniques for planar matrix transformer -- 8.4.5 Hardware demonstration -- 8.4.6 Conclusions -- 8.5 EMI filter design for high frequency GaN converters -- 8.6 Summary -- References -- 9 Applications of SiC devices -- 9.1 Retrospective -- 9.2 Application examples with SiC devices. 9.2.1 High efficient 10kVA uninterruptible power supply inverter with 1200V MOSFETs.